18 Compensator Design

18.1 Theory

The loop-shaping design methodology is to add elements to the compensator \(C(s)\) to achieve a loop shape that satisfies the design specifications and that results in good stability margins, ideally \(PM\approx 60\) degrees, all while satisfying input saturation constraints. The idea is that the controller \(C(s)\) will be composed of several building blocks: \[C(s) = C_1(s)C_2(s)\cdots C_q(s).\] Since the loop gain is \(P(s)C(s)\), on the Bode plot we have \[\begin{aligned} 20\log_{10}\left|PC\right| &= 20\log_{10}\left|P\right| + \sum_{i=1}^q 20\log_{10}\left|C_i\right| \\ \angle PC &= \angle P + \sum_{i=1}^q \angle C_i. \end{aligned}\] Therefore, the total design can be realized by adding different elements to the Bode plot until the design specifications are satisfied. In this chapter we will discuss the following five basic building blocks for loop-shaping design:

Each of these basic building blocks will be described in more detail in the sections that follow.

18.1.1 Building Block #1: Proportional Gain

The first basic building block for loop-shaping design is proportional control where \[C_P(s) = k_P.\] Proportional control is used to change the loop gain at all frequencies, without affecting the phase. A Bode plot for proportional control is shown in Fig. 18.1 for different values of \(k_P\).

The Bode plot for proportional gain at different values of k_P. The proportional gain adds a constant to the loop shape at all frequencies and does not affect the phase at any frequency.

18.1.2 Building Block #2: Integral Control

The second basic building block for loop-shaping design is proportional-integral (PI) control where \(k_P=1\), i.e., \[C_{PI}(s) = 1+\frac{k_I}{s} = \frac{s+k_I}{s}.\] The Bode plot of \(C_{PI}\) for different values of \(k_I\) is shown in Fig. 18.2. Integral control is used to change the system type by changing the slope of the loop gain by \(-20\) dB/dec at low frequencies. The Bode plot for integral control is shown in Fig. 18.2 for different values of \(k_I\). It is clear that integral control changes the slope for frequencies \(\omega<k_I\) while not affecting the loop gain when \(\omega > k_I\). Note also that integral control decreases the phase at low frequencies, which negatively impacts stability. Therefore, integral control is usually applied at low frequencies, where \(k_I \ll \omega_{co}\).

The Bode plot for integral control at different values of k_I. Integral control changes the system type by decreasing the slope of the loop shape by -20 dB/dec for frequencies below k_I, while leaving high frequencies unaffected.

18.1.3 Building Block #3: Low-Pass Filter

The third basic building block for loop-shaping design is a low-pass filter where \[C_{LPF}(s) = \frac{p}{s+p}.\] Note that the low-pass filter is constructed so that the DC gain is one. The Bode plot for a low-pass filter is shown in Fig. 18.3 for different values of \(p\). It is evident from Fig. 18.3 that a low-pass filter decreases the loop gain when \(\omega>p\) while leaving the loop gain unaffected when \(\omega<p\). Low-pass filters are used at high frequencies to enhance noise attenuation.

The Bode plot for a low-pass filter at different values of the pole p. A low-pass filter decreases the slope of the loop shape by -20 dB/dec for frequencies above p, while leaving low frequencies unaffected.

18.1.4 Building Block #4: Phase-Lag Filter

The fourth basic building block for loop-shaping design is a phase-lag filter where \[\tag{18.1} C_{Lag}(s) = \frac{s+z}{s+p},\] where \(z>p>0\). Note that the phase-lag filter is constructed so that \[\lim_{s\to\infty}\frac{s+z}{s+p} = \lim_{s\to\infty}\frac{1+\frac{z}{s}}{1+\frac{p}{s}} = 1.\] Therefore, phase-lag filters change the loop gain at low frequencies while leaving high frequencies unaffected. The Bode plot for a phase-lag filter is shown in Fig. 18.4 when \(z=1\) and when \(p=z/M\) for different values of pole-zero separation \(M\). Note that phase-lag filters increase the gain at low frequencies and that the total amount of gain is equal to the separation between the zero and the pole. Specifically, the increased gain on the Bode plot is equal to \(20\log_{10}M\). Phase-lag filters are used to enhance tracking performance and input/output disturbance rejection. Unfortunately, phase-lag filters decrease the phase between the zero and the pole and will therefore negatively affect stability if the zero is too close to the crossover frequency. Therefore, phase-lag filters are typically added at low frequencies and are characterized by the zero \(z\) where the effect of the lag ends and the pole-zero separation \(M\) which indicates the maximum gain at low frequencies. Accordingly, the lag filter 18.1 can be written as \[C_{Lag}(s) = \frac{s+z}{s+z/M}.\]

The Bode plot for a phase-lag filter when the zero is at z=1 and the pole is at p=z/M, for different values of M. A phase-lag filter increases the loop gain at low frequencies while leaving high frequencies unaffected.

18.1.5 Building Block #5: phase-lead Filter

The final basic building block for loop-shaping design that we will discuss is a phase-lead filter where \[\tag{18.2} C_{Lead}(s) = \left(\frac{p}{z}\right)\left(\frac{s+z}{s+p}\right),\] where \(p>z>0\). Note that the phase-lead filter is constructed so that \[\lim_{s\to 0}\frac{p}{z}\frac{s+z}{s+p} = 1.\] Therefore, phase-lead filters change the loop gain at high frequencies while leaving low frequencies unaffected. The Bode plot for a phase-lead filter is shown in Fig. 18.5 when \(z=1\) and when \(p=Mz\) for different values of pole-zero separation \(M\). Note that phase-lead filters increase the phase for frequencies between the zero and the pole. It can be shown that the peak of the phase plot shown in Fig. 18.5 is at \[\omega_{Lead} = \sqrt{zp}\] which is the midpoint between \(z\) and \(p\) on the Bode plot. It can also be shown that the increase in phase at \(\omega_{Lead}\) is \[\phi_{Lead} = \tan^{-1}\sqrt{\frac{p}{z}}-\tan^{-1}\sqrt{\frac{z}{p}}.\] Phase-lead filters are used to increase the phase margin and thereby enhance the stability and robustness of the system. Typically, \(\omega_{Lead}\) is selected to be the crossover frequency \(\omega_{co}\) to obtain the maximum benefit to the phase margin. Unfortunately, phase-lead filters also increase the loop gain at high frequencies as shown in Fig. 18.5, which will make the closed-loop system more sensitive to noise. Therefore, phase-lead filters are typically accompanied by a low-pass filter at higher frequencies. Since phase-lead filters are typically added at the frequency giving the desired bump in phase, it is convenient to write the transfer function 18.2 in terms of the center frequency \(\omega_{Lead}\) and the lead ratio \(M\). Using the relationship \(p=Mz\) and \(\omega_{Lead}=\sqrt{pz}\) we can write Equation 18.2 as \[\begin{aligned} C_{Lead}(s) &= M \left(\frac{s+\frac{\omega_{Lead}}{\sqrt{M}}}{s+\omega_{Lead}\sqrt{M}}\right) \\ C_{Lead}(s) &= \frac{\frac{\sqrt{M}}{\omega_{Lead}}s+1}{\frac{1}{\omega_{Lead}\sqrt{M}}s+1}. \end{aligned}\]

The Bode plot for a phase-lead filter when \omega_{Lead}=1, for different values of M. A phase-lead filter increases the phase around \omega_{Lead}. It also increases the loop gain at high frequencies.

Chapter 18 interactive figure

Compensator building-block explorer

Choose one compensator building block. The first controls set that block’s design parameters. The frequency marker does not change the block; it only reads the magnitude and phase at one point on the plot.

Interactive Figure 18.I1. Move the block parameters to see which frequency region and phase range each controller element changes.

Transfer block
Derived pole/zero locations
Magnitude effect
Phase effect
Best used for
Design warning
Probe readout

Check 1. Choosing a block for phase margin

If the loop shape has roughly the right crossover frequency but the phase margin is too small, which building block is usually the most direct choice?

Check 2. Interpreting the lead-filter tradeoff

When you increase the phase-lead ratio M, what tradeoff should you watch for?

Check 3. Explain a design choice

Choose one block from the explorer. In one or two sentences, explain what frequency range it changes and what design tradeoff it introduces.

Show guidance

A strong response names the block, identifies the affected frequency range, and includes the tradeoff. For example, a low-pass filter reduces high-frequency gain for noise attenuation but adds phase lag near the pole.

18.1.6 Simple Example 1

Given the open-loop plant \[P(s) = \frac{1}{s+1},\] design a controller \(C(s)\) so that the closed-loop system satisfies the following constraints:

(1) Tracks a ramp within \(\gamma_1=0.03\).

(2) Attenuate noise with frequency content above \(\omega_n=10\) rad/sec by \(\gamma_n = 0.1\).

(3) Reject input disturbances with frequency content below \(\omega_{d_{in}}=0.1\) rad/sec by \(\gamma_{d_{in}}=0.1\).

(4) Phase margin that is approximately \(60\) degrees.

The first three design specifications can be displayed on the Bode magnitude plot as shown in Fig. 18.6. To track a ramp within \(\gamma_1=0.03\) requires that the loop gain be above \[B_1 = 20\log_{10}\left|\frac{1}{0.03}\right|-20\log_{10}\left|\omega\right|\] as \(\omega\to 0\). Therefore, to satisfy this specification, we need to find \(C\) so that the Bode plot for \(PC\) rises above the green line on the top left of Fig. 18.6.

To attenuate noise with frequency content above \(\omega_n=10\) rad/sec by \(\gamma_n = 0.1\), the loop gain should be below \[B_n = 20\log_{10}\left|0.1\right| = -20~\text{dB}\] for \(\omega>10\) rad/sec. Therefore, we need to design \(C\) so that the Bode plot for \(PC\) is below the green line in the bottom right of Fig. 18.6.

To reject input disturbances with frequency content below \(\omega_{d_{in}}=0.1\) rad/sec by \(\gamma_{d_{in}}=0.1\), requires that the loop gain is above \[20\log_{10}\left|\frac{1}{0.1}\right| + 20\log_{10}\left|P(j\omega_{d_{in}})\right| = 20-0=20\text{~dB}\] for \(\omega<0.1\) rad/sec. Therefore, we need to design \(C\) so that the Bode plot for \(PC\) is above the green line in the left-middle of Fig. 18.6.

The Bode plot for the open-loop plant in Example 1, together with the design specifications.

To increase the type of the system so that the slope of \(PC\) is \(-20\) dB/dec as \(\omega\to 0\), integral control can be added. Fig. 18.7 shows the loop gain of \(PC\) when \[C(s) = C_{P}(s)C_{PI}(s) = \left(2\right)\left(\frac{s+0.4}{s}\right).\]

The Bode gain plot of P and PC when C includes proportional and integral control.

To increase the loop gain at low frequencies to get above the \(1/s\) line as \(\omega\to 0\), a phase-lag filter can be added. Fig. 18.8 shows the loop gain of \(PC\) when \[C(s) = C_{P}(s)C_{PI}(s)C_{Lag}(s) = \left(2\right)\left(\frac{s+0.4}{s}\right)\left(\frac{s+0.8}{s+0.8/50}\right).\] From Fig. 18.8 we see that the closed-loop system will satisfy the tracking and input disturbance specifications.

The Bode gain plot of P and PC when C includes proportional, integral, and lag filters.

To decrease the loop gain at high frequencies to achieve the noise attenuation specification, a low-pass filter can be added at \(p=5\). Fig. 18.9 shows the loop gain of \(PC\) when \[\begin{aligned} C(s) &= C_{P}(s)C_{PI}(s)C_{Lag}(s)C_{LPF}(s) \\ &= \left(2\right)\left(\frac{s+0.4}{s}\right)\left(\frac{s+0.8}{s+0.8/50}\right)\left(\frac{5}{s+5}\right). \end{aligned}\] The phase margin for this design is \(PM=63\) degrees and so all of the design specifications are satisfied, as shown in Fig. 18.9.

The Bode gain plot of P and PC when C includes proportional, integral, lag, and low-pass filters.

Chapter 18 interactive figure

Build the loop shape one compensator at a time

Step through the same loop-shaping sequence used in the example. Each card adds one compensator block, compares the new loop shape against the previous step, and shows which design requirements are satisfied.

Interactive Figure 18.I2. The dashed blue curve is the previous step and the solid blue curve is the current loop shape. The bottom panel shows phase so the crossover/phase-margin tradeoff stays visible.

Added block
Cumulative controller
What changed?
Design prompt
Spec status
Stability context

Python code that implements this example is shown below.

from control import *
import matplotlib.pyplot as plt
import numpy as np

Plant = tf([1],[1,1]) #transfer function for plant

# initialize frequency response for plant only
plt.figure()
plt.grid(which='both')

###################################
# input disturbance specification #
###################################
# reject dist below this frequency
omega_din = 10**-1
omega = np.logspace(-4, np.log10(omega_din))
Pmag, phase, _ = bode(Plant, omega, Plot=False)

# amount of input disturbance in output
gamma_din = 0.1
mag_din = 20*np.log10(1/gamma_din)*np.ones(omega.size)+
          20*np.log10(Pmag)
plt.semilogx(omega, mag_din, color=[0, 1, 0], ls=':',
             label='$d_{in}$ constraint')

#######################
# noise specification #
#######################
# attenuate noise above this frequency
omega_n = 10^1

#attenuate noise by this amount
gamma_n = .1
omega = np.logspace(np.log10(omega_n),2+np.log10(omega_n))
plt.semilogx(omega, 20*np.log10(gamma_n)*np.ones(omega.size),
             color=[0, 1, 0], ls='--', label='noise constraint')

#######################
# steady state errror #
#######################
#steady state tracking of ramp
gamma_1 = .03
omega = np.logspace(-4, 0)
plt.semilogx(omega, 20*np.log10(1/gamma_1)-20*np.log10(omega),
             color=[0, 1, 0], ls='-.',
             label='tracking error constraint')

# open-loop freq response for plant only
omega = np.logspace(-4, 3)
Pmag, phase, omega = bode(Plant,omega, Plot=False)
Pmag_dB = 20*np.log10(Pmag)
plt.semilogx(omega, Pmag_dB, label='$P(s)$')

##################
# control design #
##################
C = 1.0

#proportional control
C_kp = 2.0

#integral control
k_I = 0.4
C_PI = tf([1, k_I], [1, 0])

#phase lag
z = 0.8
M = 50.0
C_lag = tf([1, z], [1, z/M])

#low-pass filter
p = 5
C_lpf = tf([p], [1, p])

#total filter:
# for figure 18-7
C1 = C*C_kp*C_PI

# for figure 18-8
C2 = C*C_kp*C_PI*C_lag

# for figure 18-9
C3 = C*C_kp*C_PI*C_lag*C_lpf

# open-loop freq response of the controller + plant
omega = np.logspace(-4, 3)
PC_mag, phase, _ = bode(Plant*C3, omega, Plot=False)
plt.semilogx(omega, 20*np.log10(PC_mag),
             label='$P(s)C_{k_p}C_{PI}C_{lag}C_{lpf}= P(s)C(s)$')

plt.title('Bode Diagram')
plt.xlabel('Frequency (rad/s)')
plt.ylabel('Magnitude (dB)')
plt.legend()

plt.show()

18.1.7 Controller Implementation

The loop-shaping design procedure produces a controller \(C(s)\) that will have multiple elements, including integrators, lead and lag filters, and low-pass filters. Each of these elements is straightforward to implement using analog circuits. However, if the controller is to be implemented on digital hardware using computer code, what is the best way to proceed? While there are many possibilities, one option that is straightforward to implement and fits well with the previous chapters is to implement the controller using state-space equations. The controller \[U(s) = C(s) E(s)\] is first converted to continuous time state-space equations using, for example, control canonical form, to produce the equations \begin{align} \dot{z}_C &= A_{C}z_C + B_{C}e \tag{18.3} \\ u &= C_{C}z_C + D_{C}e \tag{18.4} \end{align} where \(e(t)=r(t)-y(t)\) is the input to the state-space equations, and the control signal \(u(t)\) is the output. In the example of the previous section we get \[C(s) = \frac{10 s^2 + 12 s + 3.2}{s^3 + 5.016 s^2 + 0.08 s}.\] Therefore, using controller canonical form, the controller implementation is \[\begin{aligned} \dot{z}_C &= \begin{pmatrix} -5.016 & -0.08 & 0 \\ 1 & 0 & 0 \\ 0 & 1 & 0\end{pmatrix} z_C +\begin{pmatrix} 1 \\ 0 \\ 0 \end{pmatrix}e \\ u &= \begin{pmatrix} 10 & 12 & 3.2 \end{pmatrix}z_C. \end{aligned}\] In Python, the command to find the state-space equations from the controller transfer function ‘C’ is given below:

    C_ss = tf2ss(C)
    A_C = C_ss.A
    B_C = C_ss.B
    C_C = C_ss.C
    D_C = C_ss.D

The controller is then implemented by integrating the differential equations between sample times. If \(T_s\) is the sample time, and \(N=10\) Euler steps are used between each sample, then Python code that implements the controller is shown below:

# assuming that self.z_C (the controller state) has been
# initialized elsewhere and that the controller ss equations
# are available in the Python class
def u = updateController(self, r, y):
    # calc error signal
    error = r - y

    # Euler integration steps per control calculation
    N = 10

    # integrate differential equation for controller
    for i in range(N):
        self.z_C = self.z_C + Ts / N * (self.A_C * self.z_C 
                                        + self.B_C * error)
    u = self.C_C * self.z_C + self.D_C * error

    return u

The inputs to the controller are the reference signal \(r\), the output \(y\), and the current time \(t\). The error signal is computed on Line 5. The control dynamics 18.3 are integrated using \(N\) Euler steps in Lines 11–13, and the control output equation is computed in Line 14.

18.1.8 Prefilter Design

There are applications where it is very difficult to meet the design specifications at both low and high frequencies and still achieve a phase margin that is close to \(60\) degrees. If for example, the phase margin is close to \(45\) degrees, then there will be a peak in the closed-loop Bode plot. As shown in Fig. 17.7, the peak in the closed-loop Bode plot produces overshoot and ringing in the closed-loop step response. One method for reducing the overshoot in the closed-loop step response is to add a prefilter \(F(s)\) as shown in Fig. 18.10.

The closed-loop system with a prefilter F(s) on the reference command r.

The role of the prefilter \(F(s)\) is to attenuate frequencies in \(r(t)\) that resonate with the closed-loop system and produce the overshoot. From a Bode plot perspective, the goal of the prefilter is to flatten the closed-loop Bode plot so that the peak is removed. There are several standard forms used for the prefilter. These include a notch filter and a low-pass filter. For simplicity, we will discuss the use of a low-pass filter below. As explained previously, the transfer function for a low-pass filter is given by \[\tag{18.5} F(s) = \frac{p}{s+p},\] where the DC gain is equal to one.

Just as the controller \(C(s)\) was implemented using state-space equations, the prefilter can also be implemented using state-space equations. The prefilter \[R_f(s) = F(s) R(s)\] is converted to continuous time state-space equations using, for example, control canonical form, to produce the equations \begin{align} \dot{z}_F &= A_Fz_F + B_F r \tag{18.6} \\ r_f &= C_Fz_F + D_F r \tag{18.7} \end{align} where the reference \(r(t)\) is the input to the state-space equations, and the filtered reference signal \(r_f(t)\) is the output. For the transfer function given in Equation 18.5 we get \[\begin{aligned} \dot{z}_F &= -p z_F + r \\ r_f &= p z_F. \end{aligned}\]

In Python, the command to find the state-space equations is given below, where \(F\) is the transfer-function object representing the prefilter:

    F_ss = tf2ss(F)
    A_F = F_ss.A
    B_F = F_ss.B
    C_F = F_ss.C
    D_F = F_ss.D

The prefilter is then implemented by integrating the differential equations between sample times. If \(T_s\) is the sample time, and \(N=10\) Euler steps are used between each sample, then Python code that implements the controller plus prefilter is given below:

# assuming that self.z_C and self.z_F have been initialized
# elsewhere and that the controller AND prefilter ss equations
# (e.g. A_C, B_C, C_C, D_C, A_F, B_F, etc.) are available from
# the Python class

def u = updateController(self, r, y):

    # Euler integration steps per filter calculation
    N = 10

    # integrate differential equation for controller
    for i in range(N):
        # prefilter the reference command
        self.z_F = self.z_F + Ts / N * (self.A_F * self.z_F 
                                        + self.B_F * r)
        r_filtered = self.C_F * self.z_F + self.D_F * r

        # error signal uses filtered reference
        error = r_filtered - y
        self.z_C = self.z_C + Ts / N * (self.A_C * self.z_C 
                                        + self.B_C * error)

    u = self.C_C * self.z_C + self.D_C * error

    return u

17.1.8.1 Prefilter Example

As an example, consider the open-loop system \(PC\) shown in Fig. 18.11. The phase margin is \(PM=42.5\) degrees resulting in a peak in the closed-loop frequency response, as shown in Fig. 18.11. The corresponding step response is shown in Fig. 18.12, where it can be seen that there is significant ringing in the step response.

To remove the peak in the closed-loop frequency response, a prefilter is added to the system as shown in Fig. 18.10, where the low-pass filter pole is \(p=9\), resulting in \[F(s) = \frac{9}{s+9}.\] The Bode magnitude of the prefilter \(F\) is shown in Fig. 18.11, as well as the prefiltered closed-loop response \(FPC/(1+PC)\). As can be seen from Fig. 18.11, the prefilter removes the peak in the closed-loop frequency response. The corresponding step response is shown in Fig. 18.12, where it can be seen that the ringing has been significantly reduced.

The loop gain for the open-loop system PC, the closed-loop system PC/(1+PC), the prefilter F, and the closed-loop system with the prefilter FPC/(1+PC).
The step response of the closed-loop system PC/(1+PC) and the closed-loop system with the prefilter FPC/(1+PC).

Chapter 18 interactive figure

Prefilter pole and reference-response ringing

Move the prefilter pole. The frequency plot shows how the prefilter attenuates the resonant peak, and the time plot shows the corresponding reduction in ringing.

Interactive Figure 18.I3. A slower prefilter removes more high-frequency command content, reducing ringing at the cost of slower reference response.

Prefilter
Peak tendency
Step-response tradeoff

18.1.9 Successive Loop Closure Design

When loop shaping is used to design an inner and outer loop controller in a successive loop closure design, the design of the outer loop can take into account the complete dynamics of the inner loop. This is in contrast to the design of PID controllers in Chapter 11 where the inner loop was replaced with the DC gain. Fig. 18.13 shows the system architecture for loop-shaping design. The inner and outer loop controllers are accompanied by the prefilter \(F(s)\) which is only on the outer loop.

The control architecture for a successive loop closure design, with prefilter.

Chapter 18 interactive figure

Successive loop closure: design, close, collapse, design outer loop

Step through the architecture to trace signals, close the fast inner loop, and see how the outer-loop plant changes after the inner-loop dynamics are collapsed into an equivalent block.

Current task
Plant seen by designer
Key equation
Why this step matters
Self-check

Interactive Figure 18.I4. Trace the signals, close the inner loop, and use the closed inner-loop dynamics as part of the outer-loop plant.

The first step is to design the inner loop controller \(C_{in}(s)\) using the plant \(P_{in}(s)\). However, for the design of the outer loop controller \(C_{out}(s)\), we can use the outer loop plant in cascade with the inner closed-loop system. Therefore, the plant for the outer loop design is given by \[P = P_{out}\left(\frac{P_{in}C_{in}}{1+P_{in}C_{in}}\right).\] Examples will be given in the sections below.

18.2.1 image Example Problem 3.1.21

For this homework assignment we will use loopshaping to improve the PID controllers developed in HW 3.1.13. Let \(C_{pid}(s)\) be the PID controller designed in HW 3.1.13. The final control will be \(C(s) = C_{pid}(s)C_{l}(s)\) where \(C_l\) is designed using loopshaping techniques.

(a) Design \(C_l(s)\) to meet the following objectives:

(1) Improve tracking and disturbance rejection by a factor of 10 for reference signals and disturbances below \(0.07\) rad/sec,

(2) Improve noise attention by a factor of 10 for frequencies above \(1000\) radians/sec.

(3) Phase margin that is approximately \(PM=60\) degrees.

(b) Add zero mean Gaussian noise with standard deviation \(\sigma^2=0.01\) to the simulation developed in HW 3.1.13.

(c) Implement the controller \(C(s)\) in simulation using its state-space equivalent.

(d) Note that despite having a good phase margin, there is still significant overshoot, due in part to the windup effect in the phase-lag filter. This can be mitigated by adding a prefilter, that essentially modifies the hard step input into the system. Add a low-pass filter for \(F(s)\) as a prefilter to flatten out the closed-loop Bode response and implement in simulation using its discrete-time state-space equivalent.

Design Study A guided exercise

Choose compensator building blocks

Translate each performance shortfall into a loop-shaping compensator block.

Bode magnitude plot of the arm loop gain with design specification
regions.

Use the specification regions to decide which compensator block should improve low-frequency gain, phase margin, and high-frequency noise attenuation.

Step 1. Low-frequency tracking/disturbance improvement

Step 2. Phase margin improvement

Step 3. High-frequency noise attenuation

Step 4. Reference-shaping block

Pseudocode

The complete solution includes loop-shaping code. Before opening it, outline how you would build the compensator term by term, check the Bode specifications, and compare the final step response and control effort.

This prompt is ungraded. It is intended to connect the compensator choices to the implementation code in the complete solution.

18.3 Design Study B. Inverted Pendulum

18.3.1 image Example Problem 3.2.21

For this homework assignment we will use the loopshaping design technique to design a successive loop closure controller for the inverted pendulum.

Design Study B guided exercise

Plan the pendulum loop-shaping design

Choose compensator building blocks for inner and outer loop requirements.

Inner-loop pendulum loop-shaping specification plot.

Start with the inner-loop plant and design blocks that stabilize the upright pendulum while satisfying noise and bandwidth requirements.

Step 1. Proportional gain sign

Step 2. Phase-margin block

Step 3. Noise requirement

Pseudocode

The complete solution includes separate loop-shaping scripts for the inner and outer loops. Before opening it, outline each component separately.

These prompts are ungraded. They are intended to connect the derivation to the implementation code in the complete solution.

18.4 Design Study C. Satellite Attitude Control

18.4.1 image Example Problem 3.3.21

For this homework assignment we will use the loopshaping design technique to design a successive loop closure controller for the satellite attitude problem.

Design Study C guided exercise

Plan satellite loop shaping

The satellite loop-shaping design uses rate damping, inner-loop compensation, inner-loop collapse, outer-loop compensation, and a prefilter.

Step 1. Inner-loop plant preparation

Step 2. Outer-loop plant preparation

Step 3. Final design tradeoffs

Pseudocode

18.5 Interactive Compensator Design Check

Chapter 18 activity

Compensator design requirement dashboard

Tune real compensator blocks for P(s)=1/(s+1). The Bode plot shows how the controller changes the loop shape, and the checks below connect the design to tracking, stability margin, bandwidth, and noise attenuation requirements.

Interactive Figure 18.I5. The gray curve is the plant, the blue curve is the compensated loop, the orange curve is phase, and the green guides mark the design requirements.

Low-frequency tracking
Phase margin
Bandwidth
Noise attenuation
Controller
Suggested next move

18.6 Coding Lab: Compensator Design

Objective: compose compensator transfer-function blocks and score the resulting loop shape against design requirements.

Evaluation criteria: the lab checks low-frequency gain, high-frequency rolloff, phase margin, properness, and stable compensator poles.

Figure 18.1 (Interactive). Compensator-design coding lab with loop-shaping scorecard.

18.7 Knowledge Check

Q1. Proportional gain effect

A proportional gain primarily shifts the Bode magnitude:

Q2. Lead compensator purpose

A lead compensator is commonly used to add:

Q3. Gain combination

If two compensator blocks contribute +10 dB and -4 dB, enter the combined magnitude contribution in dB.

Show solution

Answer: 6 dB. Bode magnitudes in dB add when transfer-function blocks multiply.

Q4. Phase boost target

If the uncompensated phase margin is 30 degrees and the target is 60 degrees with a 20-degree safety allowance, enter the approximate phase boost to design for.

Show solution

Answer: 50 degrees: 60 - 30 + 20 = 50 degrees.

Q5. Reference-response shaping

Which block can reduce reference-command overshoot without directly changing loop stability margins?

Show solution

Answer: A prefilter shapes the reference path without directly changing the loop gain PC.

Q6. Lead block selection

Which compensator block is the most direct choice when the design needs more positive phase near crossover?

Q7. Lag block purpose

Why is a lag compensator commonly used in loop shaping?

Q8. Low-pass filter purpose

What is the main loop-shaping role of a low-pass filter?

Q9. Scorecard diagnosis

A design meets the low-frequency tracking requirement but fails because phase margin is too small. What is the most targeted next move?

Q10. Prefilter effect

What does a prefilter change most directly?

18.8 Notes and References